00001 /* 00002 * PROPRIETARY INFORMATION. This software is proprietary to 00003 * Side Effects Software Inc., and is not to be reproduced, 00004 * transmitted, or disclosed in any way without written permission. 00005 * 00006 * Produced by: 00007 * Side Effects Software Inc 00008 * 477 Richmond Street West 00009 * Toronto, Ontario 00010 * Canada M5V 3E7 00011 * 416-504-9876 00012 * 00013 * NAME: SYS_MemoryOrder.h ( UT Library, C++) 00014 * 00015 * COMMENTS: Enumerated type for memory order of atomic operations. 00016 */ 00017 00018 #ifndef __SYS_MemoryOrder__ 00019 #define __SYS_MemoryOrder__ 00020 00021 enum SYS_MemoryOrder 00022 { 00023 SYS_MEMORY_ORDER_RELAXED, 00024 // Any reordering the compiler or hardware chooses to do is okay. 00025 SYS_MEMORY_ORDER_CONSUME, 00026 // Execute before any loads and stores by the same thread that 00027 // follow this load in program order and are data-dependent on 00028 // it. A weaker guarantee than MEMORY_ORDER_ACQUIRE. 00029 SYS_MEMORY_ORDER_ACQUIRE, 00030 // Execute before all loads and stores by the same thread that 00031 // follow it in program order. 00032 // 00033 // Effectively a "downwards" fence. Subsequent loads/stores cannot 00034 // move above the current load, but preceding loads/stores can move 00035 // below it freely. 00036 SYS_MEMORY_ORDER_RELEASE, 00037 // Execute after all loads and stores by the same thread that 00038 // precede it in program order. 00039 // 00040 // Effectively an "upwards" fence. Preceding loads/stores cannot 00041 // move below the current store, but subsequent loads/stores can 00042 // move above it freely. 00043 SYS_MEMORY_ORDER_ACQ_REL, 00044 // Both MEMORY_ORDER_ACQUIRE and MEMORY_ORDER_RELEASE guarantees 00045 // are enforced. The current operation will be executed before 00046 // any loads or stores that follow it in program order and after 00047 // any loads or stores that precede it. 00048 SYS_MEMORY_ORDER_SEQ_CST 00049 // The current operation will be executed before any loads or 00050 // stores that follow it in program order and after any loads 00051 // or stores that precede it. Moreover, sequential consistency 00052 // is assured meaning that all observers will see this operation 00053 // in the same order relative to any other MEMORY_ORDER_SEQ_CST 00054 // operations. 00055 }; 00056 00057 #endif
1.5.9