SYS_MemoryOrder.h

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/*
 * PROPRIETARY INFORMATION.  This software is proprietary to
 * Side Effects Software Inc., and is not to be reproduced,
 * transmitted, or disclosed in any way without written permission.
 *
 * NAME:        SYS_MemoryOrder.h ( UT Library, C++)
 *
 * COMMENTS:    Enumerated type for memory order of atomic operations.
 */

#ifndef __SYS_MemoryOrder__
#define __SYS_MemoryOrder__

#include "SYS_Compiler.h"
#include "SYS_Deprecated.h"
#include <atomic>

#if defined(FORCE_NON_SIMD)
    #define SYSloadFence()
    #define SYSstoreFence()
    #define SYSmemoryFence()
#else
    #if defined(LINUX) && SYS_IS_GCC_GE(3, 4) && defined(__SSE2__)
        #include <emmintrin.h>
        #include <xmmintrin.h>
    #elif defined(LINUX) && SYS_IS_GCC_GE(3, 4) && defined(__SSE__)
        #include <xmmintrin.h>
        #define SYSloadFence()
        #define SYSmemoryFence()
    #elif defined(WIN32)
        #include <emmintrin.h>
        #include <xmmintrin.h>
    #elif defined(MBSD_INTEL)
        #include <emmintrin.h>
        #include <xmmintrin.h>
    #elif defined(ARM64)
        #include <sse2neon.h>
    #else
        #define SYSloadFence()
        #define SYSstoreFence()
        #define SYSmemoryFence()
    #endif
#endif


using SYS_MemoryOrder = std::memory_order;

/// Any reordering the compiler or hardware chooses to do is okay.
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_RELAXED = std::memory_order_relaxed;

/// Prevents any reads by the same thread that follow this in
/// program order from occurring before this read, i.e. a
/// compiler and CPU load fence is placed after the read.
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_ACQUIRE = std::memory_order_acquire;

SYS_DEPRECATED_REPLACE(21.0, SYS_MEMORY_ORDER_ACQUIRE)
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_LOAD = SYS_MEMORY_ORDER_ACQUIRE;

/// Prevents any writes by the same thread that precede this in
/// program order from occurring after this write, i.e. a
/// compiler and CPU store fence is placed before the write.
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_RELEASE = std::memory_order_release;

SYS_DEPRECATED_REPLACE(21.0, SYS_MEMORY_ORDER_RELEASE)
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_STORE = SYS_MEMORY_ORDER_RELEASE;

/// A read-modify-write operation with this memory order is both an acquire
/// operation and a release operation. No memory reads or writes in the
/// current thread can be reordered before the load, nor after the store.
/// All writes in other threads that release the same atomic variable are
/// visible before the modification and the modification is visible in
/// other threads that acquire the same atomic variable.
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_ACQ_REL = std::memory_order_acq_rel;

/// The current operation will be executed before any loads or
/// stores that follow it in program order and after any loads
/// or stores that precede it.  Moreover, sequential consistency
/// is assured meaning that all observers will see this operation
/// in the same order relative to any other MEMORY_ORDER_SEQ_CST
/// operations.
inline constexpr
SYS_MemoryOrder SYS_MEMORY_ORDER_SEQ_CST = std::memory_order_seq_cst;


#ifndef SYSloadFence
/// Memory load fence:
///
/// This forces any memory reads from before this fence to finish before
/// any following memory reads, but does not enforce any ordering with
/// respect to memory writes.
inline void SYSloadFence()
{
#if defined(ARM64)
    // sse2neon maps _mm_sfence() to __sync_synchronize(),
    // which is a full memory barrier for both reads and writes.
    _mm_sfence();
#else
    _mm_lfence();
#endif
}
#endif

#ifndef SYSstoreFence
/// Memory store fence:
///
/// This forces any memory writes from before this fence to finish before
/// any following memory writes, but does not enforce any ordering with
/// respect to memory reads.
inline void SYSstoreFence()
{
    _mm_sfence();
}
#endif

#ifndef SYSmemoryFence
/// Full memory fence:
///
/// This forces any memory reads or writes from before this fence to finish before
/// any following memory reads or writes.
/// NOTE: This is *not* equivalent to a load fence and a store fence, because
///       e.g., that would not ensure that any writes have finished before any
///       following reads or vice versa.
inline void SYSmemoryFence()
{
#if defined(ARM64)
    // sse2neon maps _mm_sfence() to __sync_synchronize(),
    // which is a full memory barrier for both reads and writes.
    _mm_sfence();
#else
    _mm_mfence();
#endif
}
#endif

#endif